![]() ![]() No longer are FPGAs considered only a scaled-back prototyping platform today”s multi-million-gate devices offered at competitive price-points are fully capable of powering high-performance, high-volume products. Today, FPGA design is as sophisticated as any fixed-architecture implementation alternative, with gate counts and manufacturing processes pushing the leading edge. ![]() ![]() In this article, author Philippe Garrault presents a variety of strategies which – when coupled with the new capabilities provided by the Xilinx ISE Design Suite 10.1 – can significantly reduce implementation tool runtimes. Editor”s Note: See also the related “How To” design article: Strategies for minimizing Xilinx implementation tool runtimes. ![]()
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